MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 711

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

16.4.5
The remote frame is a message frame that is transmitted to request a data frame. The TouCAN can be
configured to transmit a data frame automatically in response to a remote frame, or to transmit a remote
frame and then wait for the responding data frame to be received.
To transmit a remote frame, a message buffer is initialized as a transmit message buffer with the RTR bit
set to one. Once this remote frame is transmitted successfully, the transmit message buffer automatically
becomes a receive message buffer, with the same ID as the remote frame that was transmitted.
When the TouCAN receives a remote frame, it compares the remote frame ID to the IDs of all transmit
message buffers programmed with a code of 1010. If there is an exact matching ID, the data frame in that
message buffer is transmitted. If the RTR bit in the matching transmit message buffer is set, the TouCAN
transmits a remote frame as a response.
A received remote frame is not stored in a receive message buffer. It is only used to trigger the automatic
transmission of a frame in response. The mask registers are not used in remote frame ID matching. All ID
bits (except RTR) of the incoming received frame must match for the remote frame to trigger a response
transmission.
16.4.6
The TouCAN does not initiate overload frame transmissions unless it detects the following conditions on
the CAN bus:
16.5
The TouCAN module has three special operating modes:
16.5.1
Debug mode is entered when the FRZ1 bit in CANMCR is set and one of the following events occurs:
Once entry into debug mode is requested, the TouCAN waits until an intermission or idle condition exists
on the CAN bus, or until the TouCAN enters the error passive or bus off state. Once one of these conditions
exists, the TouCAN waits for the completion of all internal activity. Once this happens, the following
events occur:
Freescale Semiconductor
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A dominant bit is the first or second bit of intermission
A dominant bit is the seventh (last) bit of the end-of-frame (EOF) field in receive frames
A dominant bit is the eighth (last) bit of the error frame delimiter or overload frame delimiter
Debug mode
Low-power stop mode
Auto power save mode
The HALT bit in the CANMCR is set; or
The IMB3 FREEZE line is asserted
Special Operating Modes
Remote Frames
Overload Frames
Debug Mode
MPC561/MPC563 Reference Manual, Rev. 1.2
CAN 2.0B Controller Module
16-17