MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 958

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

Development Support
23-44
11:12
22:27
Bits
4:5
10
13
14
15
16
17
18
19
20
21
28
6
7
8
9
DTLBERE
ITLBERE
FPUVEE
FPASEE
DECEE
SYSEE
LBRKE
EXTIE
Name
PREE
SEEE
ALEE
TRE
—
—
—
—
—
—
Table 23-19. DER Bit Descriptions (continued)
MPC561/MPC563 Reference Manual, Rev. 1.2
Reserved
External interrupt enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Alignment exception enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Program exception enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Floating point unavailable exception enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Decrementer exception enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Reserved
System call exception enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Trace exception enable bit
0 Debug mode entry disabled
1 Debug mode entry enabled (reset value)
Floating point assist exception enable bit.
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Reserved
Software emulation exception enable bit
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Reserved
Implementation specific instruction protection error enable bit.
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Reserved
Implementation specific data protection error enable bit.
0 Debug mode entry disabled (reset value)
1 Debug mode entry enabled
Reserved
Load/store breakpoint enable bit.
0 Debug mode entry disabled
1 Debug mode entry enabled (reset value)
Description
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