MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1172

• Manufacturer Part Number: MPC561MZP56
• Manufacturer: Freescale

Specifications of MPC561MZP56

• Cpu Family: MPC56x
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 56MHz
• Interface Type: QSPI/SCI/SPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 22
• Operating Supply Voltage (typ): 2.6/5V
• Operating Supply Voltage (max): 2.7/5.25V
• Operating Supply Voltage (min): 2.5/4.75V
• On-chip Adc: 2(32-chx10-bit)
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 388
• Package Type: BGA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Lead Free Status / RoHS Status: Not Compliant

TPU3 ROM Functions
D.9
The HALLD function decodes the sensor signals from a brushless motor (the function supports two- or
three-sensor decoding) and a direction input from the RCPU into a state number. The decoded state number
is written into a COMM channel, which outputs the required commutation drive signals. In addition to
brushless motor applications, the function can have more general applications, such as decoding “option”
switches. See Freescale TPU Progamming Note Hall Effect Decode TPU Function (HALLD),
(TPUPN10/D).
Figure D-11
D-20
ADDRESS OFFSETS
0x30XX(W + 1)A
0x30XX(W + 1)C
0x30XX(W + 1)E
0x30XX(W + 3)A
0x30XX(W + 1)0
0x30XX(W + 1)2
0x30XX(W + 1)4
0x30XX(W + 1)6
0x30XX(W + 1)8
0x30XX(W + 2)0
0x30XX(W + 2)2
Hall Effect Decode (HALLD)
:
:
shows all of the host interface areas for the HALLD function.
= Written By RCPU
= Written By TPU
1.
0
Not available on all channels.
Figure D-10. COMM Parameters (continued)
1
MPC561/MPC563 Reference Manual, Rev. 1.2
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
LENGTH
2
3
:
:
4
PARAMETER RAM
= Written by RCPU and TPU
= Unused Parameters
5
STATE
STATE
STATE
STATE
STATE
STATE
STATE
STATE
STATE
STATE
STATE 21
6
7
BITS
6
7
8
9
8
0
1
2
3
4
5
1
1
1
1
1
9
10 11 12 13 14 15
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
PIN_CONFIG
W = Master Channel Number
For address offsets, XX=41 for
TPU_A, 45 for TPU_BSee
Table 19-24
Offset Map.
:
:
Freescale Semiconductor
for PRAM Address
Param 8
Param 9
Param 10
Param 11
Param 12
Param 13
Param 14
Param 15
Param 16
Param 17
Param 29