MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 228
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
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Manufacturer:
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Burst Buffer Controller 2 Module
4.6.2.3
The following registers define protection attributes and size for four memory regions.
4-22
,
1
2
HRESET
HRESET
20:21
22:24
26:27
29:31
G and PP attributes perform similar protection activities on a region. The more protective attribute will be implied on the
region if the attributes programming oppose each other.
This field is available only on the MPC562/MPC564.
0:19
Bits
25
28
Field
Field
Addr
BTBINH
MSB
CMPR
Name
16
Region Attribute Registers (MI_RA[0:3])
0
PP
RS
G
—
—
When the MPC562/MPC564 operates in decompression on mode, a
minimum of four unused words MUST be left after the last instruction in
any region.
1
1
2
17
1
RS
Region size. For byte size by region, see
Protection bits:
00 Supervisor — No Access, User — No Access.
01 Supervisor — Fetch, User — No Access.
1x Supervisor — Fetch, User — Fetch.
Reserved
Guard attribute for region
0 Speculative fetch is not prohibited from region. Region is not guarded.
1 Speculative fetch is prohibited from guarded region. An exception will occur under such attempt.
Compressed Region.
x0 The region in not restricted
01 Region is considered a non-compressed code region. Access to the region is allowed only in
11 Region is considered a compressed code region. Access to the region is allowed only in
BTB Inhibit region
0 BTB operation is not prohibited for current memory region
1 BTB operation is prohibited for current memory region.
Reserved
Undefined
18
“Decompression Off” mode
“Decompression On” mode
2
SPR 816 (MI_RA0), SPR 817 (MI_RA1), SPR 818 (MI_RA2), 819 (MI_RA3)
Figure 4-9. Region Attribute Register (MI_RA0[0:3])
Table 4-6. MI_RA[0:3] Registers Bit Descriptions
19
3
MPC561/MPC563 Reference Manual, Rev. 1.2
20
4
PP
21
5
22
6
NOTE
000
—
23
Unchanged
7
RS
Table
Description
24
8
4-7.
25
G
9
10
26
Undefined
CMPR
11
27
BTBINH
12
28
Freescale Semiconductor
13
29
000
14
30
—
LSB
15
31
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