MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 1367

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Company:
Part Number:
MPC561MZP56
Quantity:
13
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Note: All delays are in system clock periods.
Freescale Semiconductor
1
2
3
4
5
6
7
MPWMSM Enable to output set (MAX)
Interrupt Flag to output pin reset (period
start)
Minimum output resolution depends on MPWMSM and MCPSM prescaler settings.
Maximum resolution is obtained by setting CPSMPSL[3:0] =0x2 and MPWMSCR_CP[7:0] =0xFF.
Excluding the case where the output is always “0”.
With MPWMSM enabled before enabling the MCPSM. Please also see NOTE 1 on the MCPSM timing
information.
The exact timing from MPWMSM enable to the pin being set depends on the timing of the register write and the
MCPSM VS_PCLK.
When MCPSMSCR_PSL = 0x0000, this gives a prescale value of 16 and it is 16 which should be used in these
calculations. When MCPSMSCR_PSL = 0x0001, the CPSM is inactive.
The interrupt is set before the output pin is reset (Signifying the start of a new period).
MPWMO output pin
7
Figure G-48. MCPSM Enable to MPWMO Output Pin Rising Edge Timing Diagram
MPWMO output pin
f
Characteristic
SYS
Prescaler enable
MIOB VS_PCLK
Figure G-47. MPWMSM Minimum Output Pulse Example Timing Diagram
f
SYS
is the internal system clock for the IMB3 bus.
bit (PREN)
f
SYS
Table G-24. MPWMSM Timing Characteristics
MPC561/MPC563 Reference Manual, Rev. 1.2
5
3
4
Symbol
t
t
PWMO
t
PWME
FLGP
1
min
NOTE
t
(256 - MPWMSCR_CP) * MCPSMSCR_PSL - 1
PWME
t
PWMP
(MIN) + MCPSMSCR_PSL - 1
Min
66-MHz Electrical Characteristics
6
Max
6
G-61

Related parts for MPC561MZP56