MPC561MZP56 Freescale, MPC561MZP56 Datasheet - Page 268

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC561MZP56

Cpu Family
MPC56x
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
56MHz
Interface Type
QSPI/SCI/SPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
22
Operating Supply Voltage (typ)
2.6/5V
Operating Supply Voltage (max)
2.7/5.25V
Operating Supply Voltage (min)
2.5/4.75V
On-chip Adc
2(32-chx10-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
388
Package Type
BGA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Lead Free Status / RoHS Status
Not Compliant

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System Configuration and Protection
6.2.2.1.2
The internal memory map register (IMMR) is a register located within the MPC561/MPC563 special
register space. The IMMR contains identification of a specific device as well as the base for the internal
memory map. Based on the value read from this register, software can deduce availability and location of
any on-chip system resources.
This register can be read by the mfspr instruction. The ISB field can be written by the mtspr instruction.
The PARTNUM and MASKNUM fields are mask programmed and cannot be changed.
6-28
1
2
1
2
The reset value is 101 for MPC561 and 110 for MPC563.
The reset value is a reset configuration word value extracted from the indicated bits of the internal data bus. Refer to
HRESET
HRESET
MLRC
Section 7.5.2, “Hard Reset Configuration Word
Operates as MODCK1 during reset.
This is true if MTSC is reset to 0. Otherwise, IRQ2/CR/SGPIOC2/MTS will function as MTS.
00
01
10
11
Field
Field
Addr
MSB
SGPIOC0/
SGPIOC0
16
0
0
MDO4
Internal Memory Map Register (IMMR)
IRQ0/
IRQ0
IRQ0
IRQ0
17
0
1
0000
Table 6-11. Multi-Level Reservation Control Pin Configuration
18
1
2
IRQ1/RSV/
SGPIOC1
Figure 6-13. Internal Memory Mapping Register (IMMR)
SGPIOC1
IRQ1
IRQ1
RSV
19
1
3
PARTNUM
MPC561/MPC563 Reference Manual, Rev. 1.2
FLEN
ID20
20
0
4
SGPIOC2/MTS
1
SGPIOC2
SGPIOC2
IRQ2/CR/
IRQ2
CR
X
21
(RCW).”
5
1
2
00
2
2
2
X
22
6
1
Pin Function
RETRY /SGPIOC3
ID23
SPR 638
X
23
7
1
KR/RETRY
KR/RETRY
SGPIOC3
IRQ3/KR/
2
IRQ3
24
8
25
9
0000
IRQ4/AT2/
SGPIOC4
SGPIOC4
Read-Only Fixed Value
10
26
IRQ4
AT2
AT2
MASKNUM
11
27
SGPIOC5/MODCK1
12
28
SGPIOC5/MODCK1
SGPIOC5/MODCK1
Freescale Semiconductor
IRQ5/ MODCK1
ID[28:30]
IRQ5/MODCK1
ISB
13
29
IRQ5/
1
14
30
LSB
15
31
0
1

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