HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 727

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Address
(Low)
H'FFFD3 P4DR
H'FFFD4 P5DR
H'FFFD5 P6DR
H'FFFD6 P7DR
H'FFFD7 P8DR
H'FFFD8 P9DR
H'FFFD9 PADR
H'FFFDA PBDR
H'FFFDB —
H'FFFDC —
H'FFFDD —
H'FFFDE —
H'FFFDF —
H'FFFE0 ADDRAH
H'FFFE1 ADDRAL
H'FFFE2 ADDRBH
H'FFFE3 ADDRBL
H'FFFE4 ADDRCH
H'FFFE5 ADDRCL
H'FFFE6 ADDRDH
H'FFFE7 ADDRDL
H'FFFE8 ADCSR
H'FFFE9 ADCR
Notes: 1. Writing to bits 6 to 0 of FLMCR2 is prohibited.
Legend:
WDT: Watchdog timer
TPC:
SCI:
2. Writing to bits 5 to 3 of BCR is prohibited.
3. For the procedure for writing to TCSR, TCNT, and RSTCSR, see section 11.2.4, Notes
4. The address depends on the output trigger setting.
5. Use byte access on FLMCR1, FLMCR2, EBR, and RAMCR.
Programmable timing pattern controller
Serial communication interface
Register
Name
on Register Access.
These registers are not available in a mask ROM version.
Data
Bus
Width Bit 7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
P4
—
P6
P7
—
—
PA
PB
—
—
—
—
—
AD9
AD1
AD9
AD1
AD9
AD1
AD9
AD1
ADF
TRGE
7
7
7
7
7
Bit 6
P4
—
P6
P7
—
—
PA
PB
—
—
—
—
—
AD8
AD0
AD8
AD0
AD8
AD0
AD8
AD0
ADIE
—
6
6
6
6
6
Bit 5
P4
—
P6
P7
—
P9
PA
PB
—
—
—
—
—
AD7
—
AD7
—
AD7
—
AD7
—
ADST
—
5
5
5
5
5
5
Bit 4
P4
—
P6
P7
P8
P9
PA
PB
—
—
—
—
—
AD6
—
AD6
—
AD6
—
AD6
—
SCAN
—
4
4
4
4
4
4
4
Bit Names
Bit 3
P4
P5
P6
P7
P8
P9
PA
PB
—
—
—
—
—
AD5
—
AD5
—
AD5
—
AD5
—
CKS
—
Rev. 2.00 Sep 20, 2005 page 687 of 800
3
3
3
3
3
3
3
3
Bit 2
P4
P5
P6
P7
P8
P9
PA
PB
—
—
—
—
—
AD4
—
AD4
—
AD4
—
AD4
—
CH2
—
Appendix B Internal I/O Registers
2
2
2
2
2
2
2
2
Bit 1
P4
P5
P6
P7
P8
P9
PA
PB
—
—
—
—
—
AD3
—
AD3
—
AD3
—
AD3
—
CH1
—
1
1
1
1
1
1
1
1
P4
P5
P6
P7
P8
P9
PA
PB
—
—
—
—
—
—
AD2
—
AD2
—
AD2
—
CH0
—
Bit 0
AD2
REJ09B0260-0200
0
0
0
0
0
0
0
0
Module Name
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port B
A/D converter