HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 480

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 13 Smart Card Interface
6. If an error signal is sent back from the receiving device after transmission of one frame is
7. The TEND bit in SSR is not set for the frame for which the error signal was received.
8. If an error signal is not sent back from the receiving device, the ERS flag is not set in SSR.
9. If an error signal is not sent back from the receiving device, transmission of one frame,
The smart card interface installed in the H8/3024 Group supports an IC card (smart card) interface
with provision for ISO/IEC7816-3 T=0 (character transmission). Therefore, block transfer
operations are not supported (error signal transmission, detection, and automatic data
retransmission are not performed).
Rev. 2.00 Sep 20, 2005 page 440 of 800
REJ09B0260-0200
Ds
Retransmission when SCI is in Transmit Mode
Figure 13.13 illustrates retransmission when the SCI is in transmit mode.
completed, the ERS bit is set to 1 in SSR. If the RIE bit in SCR is set to the enable state, an
ERI interrupt is requested. The ERS bit should be cleared to 0 in SSR before the next parity bit
sampling timing.
including retransmission, is assumed to have been completed, and the TEND bit is set to 1 in
SSR. If the TIE bit in SCR is set to the enable state, a TXI interrupt is requested.
TDRE
TEND
ERS
Transfer from TDR to TSR
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Frame n
Figure 13.13 Retransmission in SCI Transmit Mode
[6]
[7]
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transfer from TDR to TSR
Retransmitted frame
(DE)
[8]
[9]
Ds D0 D1 D2 D3 D4
Transfer from TDR to TSR
Frame n+1