HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 173

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 6.4
Area
8-bit access
area
16-bit access
area
Notes: 1. Undetermined data means that unpredictable data is output.
6.4.4
The initial state of each area is basic bus interface, three-state access space. The initial bus width
is selected according to the operating mode.
Area 0: Area 0 includes on-chip ROM, and in ROM-disabled expansion mode, all of area 0 is
external space. In ROM-enabled expansion mode, the space excluding on-chip ROM is external
space.
When area 0 external space is accessed, the
The size of area 0 is 128 kbytes in modes 1 and 2, and 2 Mbytes in modes 3 to 5.
Areas 1 to 6: In external expansion mode, areas 1 to 6 are entirely external space.
When area 1 to 6 external space is accessed, the
The size of areas 1 to 6 is 128 kbytes in modes 1 and 2, and 2 Mbytes in modes 3 to 5.
Area 7: Area 7 includes the on-chip RAM and registers. In external expansion mode, the space
excluding the on-chip RAM and registers is external space. The on-chip RAM is enabled when
the RAME bit in the system control register (SYSCR) is set to 1; when the RAME bit is cleared to
0, the on-chip RAM is disabled and the corresponding space becomes external space .
When area 7 external space is accessed, the
The size of area 7 is 128 kbytes in modes 1 and 2, and 2 Mbytes in modes 3 to 5.
2. Invalid means that the bus is in the input state and the input is ignored.
Memory Areas
Data Buses Used and Valid Strobes
Access
Size
Byte
Byte
Word
Read/
Write
Read
Write
Read
Write
Read
Write
Address
—
—
Even
Odd
Even
Odd
—
—
C S
C S
0
7
Valid
Strobe
R D
H W R
R D
H W R
L W R
R D
H W R
L W R
signal can be output.
C S
signal can be output.
1
to
,
C S
Rev. 2.00 Sep 20, 2005 page 133 of 800
Upper Data Bus
(D
Valid
Valid
Invalid
Valid
Undetermined data Valid
Valid
Valid
6
15
pin signals respectively can be output.
to D
8
)
Section 6 Bus Controller
Lower Data Bus
(D
Invalid
Undetermined data
Invalid
Valid
Undetermined data
Valid
Valid
REJ09B0260-0200
7
to D
0
)