HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 411

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 2
TEND
0
1
Note: etu: Elementary time unit (time required to transmit one bit)
Bit 1—Multiprocessor bit (MPB): Stores the value of the multiprocessor bit in the receive data
when a multiprocessor format is used in asynchronous mode. MPB is a read-only bit, and cannot
be written.
Bit 1
MPB
0
1
Note: * If the RE bit in SCR is cleared to 0 when a multiprocessor format is selected, MPB retains
Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added to
transmit data when a multiprocessor format in selected for transmitting in asynchronous mode.
The MPBT bit setting is ignored in synchronous mode, when a multiprocessor format is not
selected, or when the SCI cannot transmit.
For Smart Card Interface (SMIF Bit in SCMR Set to 1)
Indicates that when the last bit of a serial character was transmitted TDR did not contain valid
transmit data, so transmission has ended. The TEND flag is a read-only bit and cannot be
written.
its previous value.
Description
Transmission is in progress
[Clearing condition]
Read TDRE when TDRE = 1, then write 0 in TDRE
End of transmission
[Setting conditions]
Description
Multiprocessor bit value in receive data is 0 *
Multiprocessor bit value in receive data is 1
The chip is reset or enters standby mode
The TE bit is cleared to 0 in SCR and the FER/ERS bit is also cleared to 0
TDRE is 1 and FER/ERS is 0 (normal transmission) 2.5 etu (when GM = 0)
or 1.0 etu (when GM = 1) after a 1-byte serial character is transmitted
Section 12 Serial Communication Interface
Rev. 2.00 Sep 20, 2005 page 371 of 800
REJ09B0260-0200
(Initial value)
(Initial value)