HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 335

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Channels 2 and 3:
When bits CKS2 to CKS0 are set to (100) in 8TCR2, the timer functions as a single 16-bit
timer with channel 2 occupying the upper 8 bits and channel 3 occupying the lower 8 bits.
Setting when Compare Match Occurs
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Setting when Input Capture Occurs
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Counter Clear Specification
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OVF Flag Operation
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The CMFA or CMFB flag is set to 1 in 8TCSR2 when a 16-bit compare match occurs.
The CMFA or CMFB flag is set to 1 in 8TCSR3 when a lower 8-bit compare match
occurs.
TMO
accordance with the 16-bit compare match conditions.
TMIO
accordance with the lower 8-bit compare match conditions.
The CMFB flag is set to 1 in 8TCSR2 and 8TCSR3 when the ICE bit is 1 in TCSR3
and input capture occurs.
TMIO
in 8TCSR2.
If counter clear on compare match has been selected by the CCLR1 and CCLR0 bits in
8TCR2, the 16-bit counter (both 8TCNT2 and 8TCNT3) is cleared.
The settings of the CCLR1 and CCLR0 bits in 8TCR3 are ignored. The lower 8 bits
cannot be cleared independently.
The OVF flag is set to 1 in 8TCSR2 when the 16-bit counter (8TCNT2 and 8TCNT3)
overflows (from H'FFFF to H'0000).
The OVF flag is set to 1 in 8TCSR3 when the 8-bit counter (8TCNT3) overflows (from
H'FF to H'00).
2
3
3
pin output control by bits OIS3, OIS2, OS1, and OS0 in 8TCSR2 is in
pin output control by bits OIS3, OIS2, OS1, and OS0 in 8TCSR3 is in
pin input capture input signal edge detection is selected by bits OIS3 and OIS2
Rev. 2.00 Sep 20, 2005 page 295 of 800
Section 9 8-Bit Timers
REJ09B0260-0200