HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 465

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The operating sequence is as follows.
1. When the data line is not in use it is in the high-impedance state, and is fixed high with a pull-
2. The transmitting device starts transfer of one frame of data. The data frame starts with a start
3. With the smart card interface, the data line then returns to the high-impedance state. The data
4. The receiving device carries out a parity check. If there is no parity error and the data is
5. If the transmitting device does not receive an error signal, it proceeds to transmit the next data
up resistor.
bit (Ds, low-level), followed by 8 data bits (D0 to D7) and a parity bit (Dp).
line is pulled high with a pull-up resistor.
received normally, the receiving device waits for reception of the next data. If a parity error
occurs, however, the receiving device outputs an error signal (DE, low-level) to request
retransmission of the data. After outputting the error signal for the prescribed length of time,
the receiving device places the signal line in the high-impedance state again. The signal line is
pulled high again by a pull-up resistor.
frame. If it receives an error signal, however, it returns to step 2 and transmits the same data
again.
No parity error
Parity error
Legend
Ds:
D0 to D7: Data bits
Dp:
DE:
Start bit
Parity bit
Error signal
Ds
Ds
D0
D0
Figure 13.3 Smart Card Interface Data Format
D1
D1
Output from transmitting device
Output from transmitting device
D2
D2
D3
D3
D4
D4
D5
D5
Rev. 2.00 Sep 20, 2005 page 425 of 800
D6
D6
Section 13 Smart Card Interface
D7
D7
Dp
Dp
REJ09B0260-0200
Output from
receiving
device
DE