HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 25

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 1 Overview
Figure 1.1
Figure 1.2
Figure 1.3
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
Figure 2.13
Figure 2.14
Figure 2.15
Figure 2.16
Figure 2.17
Figure 2.18
Section 3 MCU Operating Modes
Figure 3.1
Figure 3.2
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Block Diagram.....................................................................................................
Pin Arrangement of H8/3024F-ZTAT, H8/3026F-ZTAT,
H8/3024 Mask ROM Version, and H8/3026 Mask ROM Version
(FP-100B or TFP-100B Package, Top View)......................................................
Pin Arrangement of H8/3024F-ZTAT, H8/3026F-ZTAT,
H8/3024 Mask ROM Version, and H8/3026 Mask ROM Version
(FP-100A Package, Top View)............................................................................
CPU Operating Modes......................................................................................... 20
Memory Map ....................................................................................................... 21
CPU Registers...................................................................................................... 22
Usage of General Registers.................................................................................. 23
Stack .................................................................................................................... 24
General Register Data Formats............................................................................ 26
General Register Data Formats............................................................................ 27
Memory Data Formats......................................................................................... 28
Instruction Formats.............................................................................................. 41
Memory-Indirect Branch Address Specification ................................................. 45
Processing States ................................................................................................. 49
Classification of Exception Sources .................................................................... 50
State Transitions .................................................................................................. 51
Stack Structure after Exception Handling............................................................ 52
On-Chip Memory Access Cycle .......................................................................... 54
Pin States during On-Chip Memory Access (Address Update Mode 1).............. 54
Access Cycle for On-Chip Supporting Modules.................................................. 55
Pin States during Access to On-Chip Supporting Modules ................................. 55
Memory Map of H8/3024F-ZTAT and H8/3024 Mask ROM Version in Each
Operating Mode................................................................................................... 66
Memory Map of H8/3026F-ZTAT and H8/3026 Mask ROM Version in Each
Operating Mode................................................................................................... 68
Exception Sources ............................................................................................... 72
Reset Sequence (Modes 1 and 3)......................................................................... 75
Figures
Rev. 2.00 Sep 20, 2005 page xxiii of xxxviii
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