HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 470

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 13 Smart Card Interface
13.3.6
Initialization: Before transmitting or receiving data, the smart card interface must be initialized as
described below. Initialization is also necessary when switching from transmit mode to receive
mode, or vice versa.
1. Clear the TE and RE bits to 0 in the serial control register (SCR).
2. Clear error flags ERS, PER, and ORER to 0 in the serial status register (SSR).
3. Set the parity bit (O/
4. Set the SMIF, SDIR, and SINV bits in the smart card mode register (SCMR).
5. Set a value corresponding to the desired bit rate in the bit rate register (BRR).
6. Set the CKE0 bit in SCR. Clear the TIE, RIE, TE, RE, MPIE, TEIE, and CKE1 bits to 0. If the
7. Wait at least one bit interval, then set the TIE, RIE, TE, and RE bits in SCR. Do not set the TE
Transmitting Serial Data: As data transmission in smart card mode involves error signal
sampling and retransmission processing, the processing procedure is different from that for the
normal SCI. Figure 13.5 shows a sample transmission processing flowchart.
1. Perform smart card interface mode initialization as described in Initialization above.
2. Check that the ERS error flag is cleared to 0 in SSR.
3. Repeat steps 2 and 3 until it can be confirmed that the TEND flag is set to 1 in SSR.
4. Write the transmit data in TDR, clear the TDRE flag to 0, and perform the transmit operation.
5. To continue transmitting data, go back to step 2.
6. To end transmission, clear the TE bit to 0.
The above processing may include interrupt handling.
If transmission ends and the TEND flag is set to 1 while the TIE bit is set to 1 and interrupt
requests are enabled, a transmit-data-empty interrupt (TXI) will be requested. If an error occurs in
transmission and the ERS flag is set to 1 while the RIE bit is set to 1 and interrupt requests are
enabled, a transmit/receive-error interrupt (ERI) will be requested.
Rev. 2.00 Sep 20, 2005 page 430 of 800
REJ09B0260-0200
mode register (SMR). Clear the C/
1.
When the SMIF bit is set to 1, the TxD pin and RxD pin are both switched from port to SCI
pin functions and go to the high-impedance state.
CKE0 bit is set to 1, the clock is output from the SCK pin.
bit and RE bit at the same time, except for self-diagnosis.
The TEND flag is cleared to 0.
Transmitting and Receiving Data
E
) and baud rate generator select bits (CKS1 and CKS0) in the serial
A
, CHR, and MP bits to 0, and set the STOP and PE bits to

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