HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 479

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Retransmission: Retransmission is performed by the SCI in receive mode and transmit mode as
described below.
1. If an error is found when the received parity bit is checked, the PER bit is automatically set to
2. The RDRF bit in SSR is not set for the frame in which the error has occurred.
3. If an error is found when the received parity bit is checked, the PER bit is not set to 1 in SSR.
4. If no error is found when the received parity bit is checked, the receive operation is assumed to
5. When a normal frame is received, the data pin is held in three-state at the error signal
Retransmission when SCI is in Receive Mode
Figure 13.12 illustrates retransmission when the SCI is in receive mode.
1. If the RIE bit in SCR is set to the enable state, an ERI interrupt is requested. The PER bit
should be cleared to 0 in SSR before the next parity bit sampling timing.
have been completed normally, and the RDRF bit is automatically set to 1 in SSR. If the RIE
bit in SCR is set to the enable state, an RXI interrupt is requested.
transmission timing.
RDRF
PER
Ds
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Frame n
Figure 13.12 Retransmission in SCI Receive Mode
[2]
[1]
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Retransmitted frame
Rev. 2.00 Sep 20, 2005 page 439 of 800
Section 13 Smart Card Interface
(DE)
[4]
[3]
Ds D0 D1 D2 D3 D4
REJ09B0260-0200
Frame n+1

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