HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 31

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Figure 13.12 Retransmission in SCI Receive Mode ................................................................. 439
Figure 13.13 Retransmission in SCI Transmit Mode................................................................ 440
Section 14 A/D Converter
Figure 14.1
Figure 14.2
Figure 14.3
Figure 14.4
Figure 14.5
Figure 14.6
Figure 14.7
Figure 14.8
Figure 14.9
Figure 14.10 A/D Converter Accuracy Definitions (2)............................................................. 460
Figure 14.11 Analog Input Circuit (Example) .......................................................................... 461
Section 15 D/A Converter
Figure 15.1
Figure 15.2
Section 16 RAM
Figure 16.1
Section 17 Flash Memory [H8/3026F-ZTAT Version]
Figure 17.1
Figure 17.2
Figure 17.3
Figure 17.4
Figure 17.5
Figure 17.6
Figure 17.7
Figure 17.8
Figure 17.9
Figure 17.10 Program/Program-Verify Flowchart (128-Byte Programming)........................... 507
Figure 17.11 Erase/Erase-Verify Flowchart (Single-Block Erasing) ........................................ 510
Figure 17.12 Flash Memory State Transitions (When High Level is Applied to FWE Pin
Figure 17.13 Flowchart of Flash Memory Emulation in RAM................................................. 515
Figure 17.14 Example of RAM Overlap Operation .................................................................. 516
Figure 17.15 Memory Map in PROM Mode............................................................................. 519
External Trigger Input Timing............................................................................. 456
A/D Converter Block Diagram ............................................................................ 442
A/D Data Register Access Operation (Reading H'AA40) ................................... 450
Example of A/D Converter Operation (Single Mode, Channel 1 Selected) ........ 452
Example of A/D Converter Operation (Scan Mode, Channels AN
Selected) .............................................................................................................. 454
A/D Conversion Timing ...................................................................................... 455
Example of Analog Input Protection Circuit ....................................................... 458
Analog Input Pin Equivalent Circuit.................................................................... 458
A/D Converter Accuracy Definitions (1)............................................................. 460
D/A Converter Block Diagram ............................................................................ 464
Example of D/A Converter Operation ................................................................. 469
RAM Block Diagram........................................................................................... 472
Block Diagram of Flash Memory ........................................................................ 477
Flash Memory Related State Transitions............................................................. 488
Reading Overlap RAM Data in User Mode/User Program Mode ....................... 491
Writing Overlap RAM Data in User Program Mode ........................................... 492
System Configuration When Using Boot Mode .................................................. 494
Boot Mode Execution Procedure......................................................................... 495
RAM Areas in Boot Mode................................................................................... 497
Example of User Program Mode Execution Procedure ....................................... 500
FLMCR1 Bit Settings and State Transitions ....................................................... 502
in Mode 5 or 7 (On-Chip ROM Enabled))........................................................... 514
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