HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 19

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.3 Operation .......................................................................................................................... 423
13.4 Usage Notes ...................................................................................................................... 437
Section 14 A/D Converter
14.1 Overview........................................................................................................................... 441
14.2 Register Descriptions........................................................................................................ 445
14.3 CPU Interface ................................................................................................................... 449
14.4 Operation .......................................................................................................................... 451
14.5 Interrupts........................................................................................................................... 456
14.6 Usage Notes ...................................................................................................................... 457
Section 15 D/A Converter
15.1 Overview........................................................................................................................... 463
15.2 Register Descriptions........................................................................................................ 466
13.2.1 Smart Card Mode Register (SCMR).................................................................... 418
13.2.2 Serial Status Register (SSR) ................................................................................ 420
13.2.3 Serial Mode Register (SMR) ............................................................................... 421
13.2.4 Serial Control Register (SCR) ............................................................................. 422
13.3.1 Overview.............................................................................................................. 423
13.3.2 Pin Connections................................................................................................... 423
13.3.3 Data Format ......................................................................................................... 424
13.3.4 Register Settings .................................................................................................. 426
13.3.5 Clock.................................................................................................................... 428
13.3.6 Transmitting and Receiving Data ........................................................................ 430
14.1.1 Features................................................................................................................ 441
14.1.2 Block Diagram..................................................................................................... 442
14.1.3 Pin Configuration ................................................................................................ 443
14.1.4 Register Configuration......................................................................................... 444
14.2.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 445
14.2.2 A/D Control/Status Register (ADCSR) ............................................................... 446
14.2.3 A/D Control Register (ADCR) ............................................................................ 448
14.4.1 Single Mode (SCAN = 0) .................................................................................... 451
14.4.2 Scan Mode (SCAN = 1)....................................................................................... 453
14.4.3 Input Sampling and A/D Conversion Time ......................................................... 455
14.4.4 External Trigger Input Timing............................................................................. 456
15.1.1 Features................................................................................................................ 463
15.1.2 Block Diagram..................................................................................................... 464
15.1.3 Pin Configuration ................................................................................................ 465
15.1.4 Register Configuration......................................................................................... 465
15.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1) ................................................. 466
15.2.2 D/A Control Register (DACR) ............................................................................ 466
................................................................................................. 441
................................................................................................. 463
Rev. 2.00 Sep 20, 2005 page xvii of xxxviii