HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 212

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 7 I/O Ports
7.7.2
Table 7.10 summarizes the registers of port 6.
Table 7.10 Port 6 Registers
Address *
H'EE005
H'FFFD5
Note: * Lower 20 bits of the address in advanced mode.
Port 6 Data Direction Register (P6DDR): P6DDR is an 8-bit write-only register that can select
input or output for each pin in port 6.
Bit 7 is reserved. It is fixed at 1, and cannot be modified.
Rev. 2.00 Sep 20, 2005 page 172 of 800
REJ09B0260-0200
Bit
Initial value
Read/Write
Modes 1 to 5 (Expanded Modes)
P6
PSTOP bit in MSTRCH is cleared to 0 (initial value), and an input port if this bit is set to 1.
P6
settings of bits P6
P6
input/output ports. For the method of selecting the pin functions, see table 7.11.
When P6
corresponding P6DDR bit is set to 1, and an input port if this bit is cleared to 0.
7
6
2
functions as the clock output pin ( ) or an input port. P6
to P6
to P6
Register Descriptions
2
3
0
to P6
function as bus control output pins (
function as bus control input/output pins (
Reserved bit
Port 6 data register
Name
Port 6 data direction register
0
—
—
function as input/output ports, the pin becomes an output port if the
7
1
6
DDR to P6
P6 DDR
6
W
6
0
3
DDR.
P6 DDR
5
W
5
0
P6 DDR
Port 6 data direction 6 to 0
These bits select input or output for port 6 pins
4
L W R
W
4
0
Abbreviation
P6DDR
P6DR
,
B A C K
P6 DDR
H W R
3
W
3
0
,
,
7
R D
B R E Q
is the clock output pin (ø) if the
P6 DDR
, and
2
W
R/W
W
R/W
2
0
, and
A S
) , regardless of the
W A I T
P6 DDR
1
W
1
0
Initial Value
H'80
H'80
) or
P6 DDR
0
W
0
0