HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 206

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 7 I/O Ports
ABWCR and P4DDR are not initialized in software standby mode. Therefore, if a transition is
made to software standby mode while port 4 is functioning as an input/output port and a P4DDR
bit is set to 1, the corresponding pin maintains its output state.
Port 4 Data Register (P4DR): P4DR is an 8-bit readable/writable register that stores output data
for port 4. When port 4 functions as an output port, the value of this register is output. When a bit
in P4DDR is set to 1, if port 4 is read the value of the corresponding P4DR bit is returned. When a
bit in P4DDR is cleared to 0, if port 4 is read the corresponding pin logic level is read.
P4DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Port 4 Input Pull-Up MOS Control Register (P4PCR): P4PCR is an 8-bit readable/writable
register that controls the MOS input pull-up transistors in port 4.
In modes 6 and 7 (single-chip mode), and in 8-bit bus mode in modes 1 to 5 (expanded modes),
when a P4DDR bit is cleared to 0 (selecting generic input), if the corresponding P4PCR bit is set
to 1, the input pull-up transistor is turned on.
P4PCR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Table 7.7 summarizes the states of the input pull-up MOS in each operating mode.
Rev. 2.00 Sep 20, 2005 page 166 of 800
REJ09B0260-0200
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
P4 PCR
R/W
R/W
P4
7
7
0
7
0
7
P4 PCR
R/W
R/W
P4
6
6
0
6
0
6
P4 PCR
Port 4 input pull-up MOS control 7 to 0
These bits control input pull-up transistors built into port 4
R/W
R/W
P4
5
5
0
5
0
5
Port 4 data 7 to 0
These bits store data for port 4 pins
P4 PCR
R/W
R/W
P4
4
4
0
4
0
4
P4 PCR
R/W
R/W
P4
3
3
0
3
0
3
P4 PCR
R/W
R/W
P4
2
2
0
2
0
2
P4 PCR
R/W
R/W
P4
1
1
0
1
0
1
P4 PCR
R/W
R/W
P4
0
0
0
0
0
0