HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 429

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Receiving Serial Data (Asynchronous Mode): Figure 12.7 shows a sample flowchart for
receiving serial data and indicates the procedure to follow.
No
No
Read receive data from RDR, and
Read ORER, PER, and FER
clear RDRF flag to 0 in SSR
PER
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
All data received?
Start receiving
flags in SSR
FER
RDRF = 1
Figure 12.7 Sample Flowchart for Receiving Serial Data
Initialize
<End>
Yes
Yes
No
OPER = 1
(continued on next page)
Error handling
Yes
(5)
(1)
(2)
(4)
(3)
(2)(3)
(4)
(5)
(1)
SCI initialization:
the receive data input function of the RxD
pin is selected automatically.
Receive error handling and break detection:
if a receive error occurs, read the ORER,
PER, and FER flags in SSR to identify the
error. After executing the necessary error
handling, clear the ORER, PER, and FER
flags all to 0. Receiving cannot resume if
any of these flags remains set to 1. When a
framing error occurs, the RxD pin can be
read to detect the break state.
SCI status check and receive data read:
read SSR, check that the RDRF flag is set
to 1, then read receive data from RDR and
clear the RDRF flag to 0. Notification that
the RDRF flag has changed from 0 to 1 can
also be given by the RXI interrupt.
To continue receiving serial data:
check the RDRF flag, read RDR, and clear
the RDRF flag to 0 before the stop bit of the
current frame is received.
Section 12 Serial Communication Interface
Rev. 2.00 Sep 20, 2005 page 389 of 800
REJ09B0260-0200