HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 104

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 3 MCU Operating Modes
3.5
The pin functions of ports 1 to 5 and port A vary depending on the operating mode. Table 3.3
indicates their functions in each operating mode.
Table 3.3
Port
Port 1
Port 2
Port 3
Port 4
Port 5
Port A
Notes: 1. Initial state. The bus mode can be switched by settings in ABWCR. These pins function
Rev. 2.00 Sep 20, 2005 page 64 of 800
REJ09B0260-0200
2. Initial state. These pins become address output pins when the corresponding bits in the
3. Initial state. A
4. Initial state. PA
Mode 1
A
A
D
P4
A
PA
7
15
19
Pin Functions in Each Operating Mode
15
7
to A
7
as P4
data direction registers (P1DDR, P2DDR, P5DDR) are set to 1.
A
of BRCR.
to A
to A
to D
to P4
to PA
21
Pin Functions in Each Mode
0
output by writing 0 in bits 7 to 5 of BRCR.
8
16
8
0
4
7
*
1
to P4
Mode 2
A
A
D
D
A
PA
7
15
19
15
7
to A
to D
7
to A
to A
to D
0
to PA
20
in 8-bit bus mode, and as D
7
0
0
is always an address output pin. PA
8
16
8
*
to PA
1
4
Mode 3
A
A
D
P4
A
PA
4
7
15
19
15
7
are switched over to A
to A
6
to A
to A
to D
to P4
to PA
0
8
16
8
0
4
*
, A
1
20
*
3
Mode 4
A
A
D
D
A
PA
7
15
19
15
7
to A
6
to D
to A
to A
to D
to PA
7
to D
0
0
8
16
8
*
1
4
23
, A
0
to A
in 16-bit bus mode.
20
*
3
6
20
to PA
Mode 5
P1
P2
D
P4
P5
PA
output by writing 0 in bits 7 to 4
15
7
7
7
3
7
to D
to P1
to P2
to P4
to P5
to PA
4
are switched over to A
8
0
0
0
0
4
*
*
*
*
*
2
2
1
2
4
Mode 6
P1
P2
P3
P4
P5
PA
7
7
7
7
3
7
to P1
to P2
to P3
to P4
to P5
to PA
0
0
0
0
0
4
Mode 7
P1
P2
P3
P4
P5
PA
7
7
7
7
3
7
to P1
to P2
to P3
to P4
to P5
to PA
23
to
0
0
0
0
0
4