HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 476
![MCU 3V 256K 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
HD64F3026X25
Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.DF3026XBL25V.pdf
(843 pages)
Specifications of HD64F3026X25
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 476 of 843
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Section 13 Smart Card Interface
Table 13.8 Smart Card Interface Mode Operating States and Interrupt Sources
Operating State
Transmit Mode
Receive Mode
Examples of Operation in GSM Mode: When switching between smart card interface mode and
software standby mode, use the following procedures to maintain the clock duty cycle.
1. Set the P9
2. Write 0 in the TE and RE bits in the serial control register (SCR) to stop transmit/receive
3. Write 0 in the CKE0 bit in SCR to stop the clock.
4. Wait for one serial clock cycle. During this period, the duty cycle is preserved and clock output
5. Write H'00 in the serial mode register (SMR) and smart card mode register (SCMR).
6. Make the transition to the software standby state.
1'. Clear the software standby state.
2'. Set the CKE1 bit in SCR to the value for the fixed output state at the start of software standby
3'. Set smart card interface mode and output the clock. Clock signal generation is started with the
Rev. 2.00 Sep 20, 2005 page 436 of 800
REJ09B0260-0200
Switching from smart card interface mode to software standby mode
output state in software standby mode.
operations. At the same time, set the CKE1 bit to the value for the fixed output state in
software standby mode.
is fixed at the specified level.
Returning from software standby mode to smart card interface mode
(the current P9
normal duty cycle.
4
data register (DR) and data direction register (DDR) to the values for the fixed
Figure 13.10 Procedure for Stopping and Restarting the Clock
4
pin state).
Normal operation
Error
Normal operation
Error
1 2 3
Normal operation
4
5 6
Flag
TEND
ERS
RDRF
PER, ORER
Software
standby
1' 2' 3'
Normal operation
Enable Bit
TIE
RIE
RIE
RIE
Interrupt Source
TXI
ERI
RXI
ERI
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