HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 292

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 8 16-Bit Timer
8.4.5
In phase counting mode the phase difference between two external clock inputs (at the TCLKA
and TCLKB pins) is detected, and 16TCNT2 counts up or down accordingly.
In phase counting mode, the TCLKA and TCLKB pins automatically function as external clock
input pins and 16TCNT2 becomes an up/down-counter, regardless of the settings of bits TPSC2 to
TPSC0, CKEG1, and CKEG0 in 16TCR2. Settings of bits CCLR1, CCLR0 in 16TCR2, and
settings in TIOR2, TISRA, TISRB, TISRC, setting of STR2 bit in TSTR, GRA2, and GRB2 are
valid. The input capture and output compare functions can be used, and interrupts can be
generated.
Phase counting is available only in channel 2.
Sample Setup Procedure for Phase Counting Mode: Figure 8.29 shows a sample procedure for
setting up phase counting mode.
Rev. 2.00 Sep 20, 2005 page 252 of 800
REJ09B0260-0200
Select phase counting mode
Select flag setting condition
Phase Counting Mode
Phase counting mode
Phase counting mode
Figure 8.29 Setup Procedure for Phase Counting Mode (Example)
Start counter
1
2
3
1.
2.
3.
Set the MDF bit in TMDR to 1 to select
phase counting mode.
Select the flag setting condition with
the FDIR bit in TMDR.
Set the STR2 bit to 1 in TSTR to start
the timer counter.

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