HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 524

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 17 Flash Memory [H8/3026F-ZTAT Version]
more bits at the same time. When the on-chip flash memory is disabled, a read access to this
register will return H'00, and erasing is disabled.
The flash memory block configuration is shown in table 17.4. To erase the entire flash memory,
each block must be erased in turn.
As the H8/3026F-ZTAT version does not support on-board programming modes in mode 6, EBR1
register bits cannot be set to 1 in this mode.
17.3.4
EBR2 is an 8-bit register that specifies the flash memory erase area block by block. EBR2 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, and when a
low level is input to the FWE pin. When a high level is input to the FWE pin and the SWE bit in
FLMCR1 is not set, it is initialized to bit 0. When a bit in EBR2 is set to 1, the corresponding
block can be erased. Other blocks are erase-protected. Only one bit can be set in EBR1 and EBR2
together; do not set two or more bits at the same time. When the on-chip flash memory is disabled,
a read will return H'00, and erasing is disabled.
The flash memory block configuration is shown in table 17.4. To erase the entire flash memory,
each block must be erased in turn.
As the H8/3026F-ZTAT version does not support on-board programming modes in mode 6, EBR2
register bits cannot be set to 1 in this mode.
Note: Bits 7 to 4 in this register are read-only. These bits must not be set to 1. If bits 7 to 4 are
Rev. 2.00 Sep 20, 2005 page 484 of 800
REJ09B0260-0200
Bit
Initial value
Read/Write
set when an EBR1/EBR2 bit is set, EBR1/EBR2 will be initialized to H'00.
Erase Block Register 2 (EBR2)
—
R
7
0
—
R
6
0
—
R
5
0
—
R
4
0
EB11
R/W
3
0
EB10
R/W
2
0
R/W
EB9
1
0
R/W
EB8
0
0