HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 12

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.9
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
3.5
3.6
Section 4 Exception Handling
4.1
4.2
4.3
4.4
4.5
4.6
Rev. 2.00 Sep 20, 2005 page x of xxxviii
2.8.6
2.8.7
Basic Operational Timing ................................................................................................. 53
2.9.1
2.9.2
2.9.3
2.9.4
Overview........................................................................................................................... 57
3.1.1
3.1.2
Mode Control Register (MDCR) ...................................................................................... 59
System Control Register (SYSCR) ................................................................................... 60
Operating Mode Descriptions ........................................................................................... 62
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.4.6
3.4.7
Pin Functions in Each Operating Mode ............................................................................ 64
Memory Map in Each Operating Mode ............................................................................ 65
3.6.1
3.6.2
Overview........................................................................................................................... 71
4.1.1
4.1.2
4.1.3
Reset ................................................................................................................................. 74
4.2.1
4.2.2
4.2.3
Interrupts........................................................................................................................... 77
Trap Instruction ................................................................................................................ 78
Stack Status after Exception Handling.............................................................................. 79
Notes on Stack Usage ....................................................................................................... 80
Reset State ........................................................................................................... 53
Power-Down State ............................................................................................... 53
Overview.............................................................................................................. 53
On-Chip Memory Access Timing........................................................................ 54
On-Chip Supporting Module Access Timing ...................................................... 55
Access to External Address Space....................................................................... 56
Operating Mode Selection ................................................................................... 57
Register Configuration......................................................................................... 58
Mode 1................................................................................................................. 62
Mode 2................................................................................................................. 62
Mode 3................................................................................................................. 63
Mode 4................................................................................................................. 63
Mode 5................................................................................................................. 63
Mode 6................................................................................................................. 63
Mode 7................................................................................................................. 63
Comparison of H8/3024 Group Memory Maps................................................... 65
Reserved Areas .................................................................................................... 65
Exception Handling Types and Priority............................................................... 71
Exception Handling Operation ............................................................................ 71
Exception Vector Table ....................................................................................... 72
Overview.............................................................................................................. 74
Reset Sequence .................................................................................................... 74
Interrupts after Reset............................................................................................ 77
......................................................................................... 71
.................................................................................. 57