HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 392

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 Serial Communication Interface
Features of the smart card interface are listed below.
Rev. 2.00 Sep 20, 2005 page 352 of 800
REJ09B0260-0200
There is a single serial data communication format.
Full-duplex communication
The transmitting and receiving sections are independent, so the SCI can transmit and receive
simultaneously. The transmitting and receiving sections are both double-buffered, so serial
data can be transmitted and received continuously.
The following settings can be made for the serial data to be transferred:
Built-in baud rate generator with selectable bit rates
Selectable transmit/receive clock sources: internal clock from baud rate generator, or external
clock from the SCK pin
Four types of interrupts
Transmit-data-empty, transmit-end, receive-data-full, and receive-error interrupts are requested
independently.
Asynchronous communication
Built-in baud rate generator with selectable bit rates
Three types of interrupts
Transmit-data-empty, receive-data-full, and transmit/receive-error interrupts are requested
independently.
Data length:
Receive error detection: overrun errors
LSB-first or MSB-first transfer
Inversion of data logic level
Data length: 8 bits
Parity bits generated and checked
Error signal output in receive mode (parity error)
Error signal detect and automatic data retransmit in transmit mode
Supports both direct convention and inverse convention
8 bits

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