HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 125

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.1.3
Table 5.1 lists the interrupt pins.
Table 5.1
Name
Nonmaskable interrupt
External interrupt request 5 to 0
Note: * In the versions with on-chip flash memory, NMI input is sometimes disabled. For details see
5.1.4
Table 5.2 lists the registers of the interrupt controller.
Table 5.2
Address *
H'EE012
H'EE014
H'EE015
H'EE016
H'EE018
H'EE019
Notes: 1. Lower 20 bits of the address in advanced mode.
5.2
5.2.1
SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
17.9, NMI Input Disabling Conditions.
2. Only 0 can be written, to clear flags.
Pin Configuration
Register Configuration
Register Descriptions
System Control Register (SYSCR)
1
Interrupt Pins
Interrupt Controller Registers
Name
IRQ sense control register
IRQ enable register
IRQ status register
Interrupt priority register A
Interrupt priority register B
System control register
Abbreviation
NMI
I R Q
5
to
I R Q
0
Abbreviation
SYSCR
ISCR
IER
ISR
IPRA
IPRB
I/O
Input
Input
Rev. 2.00 Sep 20, 2005 page 85 of 800
Function
Nonmaskable interrupt * , rising edge
or falling edge selectable
Maskable interrupts, falling edge or
level sensing selectable
Section 5 Interrupt Controller
R/W
R/W
R/W
R/W
R/(W) *
R/W
R/W
2
REJ09B0260-0200
Initial Value
H'09
H'00
H'00
H'00
H'00
H'00

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