HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 191

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7.1
The H8/3024 Group has 10 input/output ports (ports 1, 2, 3, 4, 5, 6, 8, 9, A, and B) and one input-
only port (port 7). Table 7.1 summarizes the port functions. The pins in each port are multiplexed
as shown in table 7.1.
Each port has a data direction register (DDR) for selecting input or output, and a data register
(DR) for storing output data. In addition to these registers, ports 2, 4, and 5 have an input pull-up
control register (PCR) for switching input pull-up transistors on and off.
Ports 1 to 6 and port 8 can drive one TTL load and a 90-pF capacitive load. Ports 9, A, and B can
drive one TTL load and a 30-pF capacitive load. Ports 1 to 6 and 8 to B can drive a darlington
pair. Ports 1, 2, and 5 can drive LEDs (with 10-mA current sink). Pins P8
Schmitt-trigger input circuits.
For block diagrams of the ports see appendix C, I/O Port Block Diagrams.
Table 7.1
Port 1 • 8-bit I/O
Port 2 • 8-bit I/O
Port 3 • 8-bit I/O
Port
• Can drive
• Built-in
• Can drive
Description
port
LEDs
port
input
pull-up
transistors
LEDs
port
Overview
Port Functions
P1
A
P2
A
P3
D
7
15
15
7
7
7
to A
to A
to D
to P1
to P2
to P3
Pins
0
8
8
0
0
0
/
/
/
Mode 1 Mode 2 Mode 3 Mode 4
Address output pins (A
Address output pins (A
Data input/output (D
Section 7 I/O Ports
Expanded Modes
15
to D
7
15
to A
to A
8
)
Rev. 2.00 Sep 20, 2005 page 151 of 800
0
)
8
)
Address output
(A
generic input
DDR = 0:
generic input
DDR = 1:
address output
Address output
(A
generic input
DDR = 0:
generic input
DDR = 1:
address output
7
15
to A
Mode 5
to A
2
0
to P8
) and
8
) and
Section 7 I/O Ports
REJ09B0260-0200
0
, PA
Mode 6 Mode 7
Generic input/
output
Generic input/
output
Generic input/
output
7
Single-Chip
to PA
Modes
0
have