HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 367

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 3—Group 3 Non-Overlap (G3NOV): Selects normal or non-overlapping TPC output for
group 3 (TP
Bit 2—Group 2 Non-Overlap (G2NOV): Selects normal or non-overlapping TPC output for
group 2 (TP
Bit 1—Group 1 Non-Overlap (G1NOV): Selects normal or non-overlapping TPC output for
group 1 (TP
Bit 0—Group 0 Non-Overlap (G0NOV): Selects normal or non-overlapping TPC output for
group 0 (TP
Bit 3
G3NOV
0
1
Bit 2
G2NOV
0
1
Bit 1
G1NOV
0
1
Bit 0
G0NOV
0
1
15
11
7
3
Description
Normal TPC output in group 3 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 3 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
Description
Normal TPC output in group 2 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 2 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
Description
Normal TPC output in group 1 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 1 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
Description
Normal TPC output in group 0 (output values change at
compare match A in the selected 16-bit timer channel)
Non-overlapping TPC output in group 0 (independent 1 and 0 output at
compare match A and B in the selected 16-bit timer channel)
to TP
to TP
to TP
to TP
4
0
12
8
).
).
).
).
Section 10 Programmable Timing Pattern Controller (TPC)
Rev. 2.00 Sep 20, 2005 page 327 of 800
REJ09B0260-0200
(Initial value)
(Initial value)
(Initial value)
(Initial value)