HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 27

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Figure 6.15
Figure 6.16
Figure 6.17
Figure 6.18
Figure 6.19
Figure 6.20
Figure 6.21
Figure 6.22
Figure 6.23
Section 7 I/O Ports
Figure 7.1
Figure 7.2
Figure 7.3
Figure 7.4
Figure 7.5
Figure 7.6
Figure 7.7
Figure 7.8
Figure 7.9
Figure 7.10
Figure 7.11
Section 8 16-Bit Timer
Figure 8.1
Figure 8.2
Figure 8.3
Figure 8.4
Figure 8.5
Figure 8.6
Figure 8.7
Figure 8.8
Figure 8.9
Figure 8.10
Figure 8.11
Figure 8.12
Figure 8.13
Figure 8.14
Figure 8.15
Figure 8.16
BRCR Write Timing............................................................................................ 150
Port 1 Pin Configuration...................................................................................... 155
Port 2 Pin Configuration...................................................................................... 158
Port 3 Pin Configuration...................................................................................... 162
Port 4 Pin Configuration...................................................................................... 164
Port 5 Pin Configuration...................................................................................... 167
Port 6 Pin Configuration...................................................................................... 171
Port 7 Pin Configuration...................................................................................... 175
Port 8 Pin Configuration...................................................................................... 177
Port 9 Pin Configuration...................................................................................... 182
Port A Pin Configuration ..................................................................................... 188
Port B Pin Configuration ..................................................................................... 200
Count Timing for Internal Clock Sources............................................................ 241
Count Timing for External Clock Sources (when Both Edges are Detected) ...... 242
Bus Control Signal Timing for 16-Bit, Two-State-Access Area (3)
(Word Access) ..................................................................................................... 141
Example of Wait State Insertion Timing ............................................................. 142
Example of Idle Cycle Operation (ICIS1 = 1) ..................................................... 143
Example of Idle Cycle Operation (ICIS0 = 1) ..................................................... 144
Example of Idle Cycle Operation ........................................................................ 145
Example of External Bus Master Operation ........................................................ 148
ASTCR Write Timing.......................................................................................... 149
DDR Write Timing .............................................................................................. 149
16-bit timer Block Diagram (Overall) ................................................................. 209
Block Diagram of Channels 0 and 1 .................................................................... 210
Block Diagram of Channel 2 ............................................................................... 211
16TCNT Access Operation [CPU
Access to Timer Counter (CPU Reads 16TCNT, Word)..................................... 235
Access to Timer Counter H (CPU Writes to 16TCNTH, Upper Byte)................ 236
Access to Timer Counter L (CPU Writes to 16TCNTL, Lower Byte) ................ 236
Access to Timer Counter H (CPU Reads 16TCNTH, Upper Byte)..................... 236
Access to Timer Counter L (CPU Reads 16TCNTL, Lower Byte) ..................... 237
16TCR Access (CPU Writes to 16TCR) ............................................................. 237
16TCR Access (CPU Reads 16TCR) .................................................................. 238
Counter Setup Procedure (Example) ................................................................... 239
Free-Running Counter Operation ........................................................................ 240
Periodic Counter Operation ................................................................................. 241
16TCNT (Word)] ..................................... 235
Rev. 2.00 Sep 20, 2005 page xxv of xxxviii