HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 11

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 1 Overview
1.1
1.2
1.3
1.4
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview...........................................................................................................................
Block Diagram..................................................................................................................
Pin Description .................................................................................................................
1.3.1
1.3.2
1.3.3
Caution on Crystal Resonator Connection........................................................................ 18
Overview........................................................................................................................... 19
2.1.1
2.1.2
CPU Operating Modes...................................................................................................... 20
Address Space................................................................................................................... 21
Register Configuration...................................................................................................... 22
2.4.1
2.4.2
2.4.3
2.4.4
Data Formats..................................................................................................................... 26
2.5.1
2.5.2
Instruction Set................................................................................................................... 29
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
Addressing Modes and Effective Address Calculation..................................................... 43
2.7.1
2.7.2
Processing States .............................................................................................................. 49
2.8.1
2.8.2
2.8.3
2.8.4
2.8.5
Pin Arrangement..................................................................................................
Pin Functions ....................................................................................................... 10
Pin Assignments in Each Mode ........................................................................... 15
Features................................................................................................................ 19
Differences from H8/300 CPU ............................................................................ 20
Overview.............................................................................................................. 22
General Registers................................................................................................. 23
Control Registers ................................................................................................. 24
Initial CPU Register Values................................................................................. 25
General Register Data Formats............................................................................ 26
Memory Data Formats......................................................................................... 27
Instruction Set Overview ..................................................................................... 29
Instructions and Addressing Modes..................................................................... 30
Tables of Instructions Classified by Function...................................................... 31
Basic Instruction Formats .................................................................................... 40
Notes on Use of Bit Manipulation Instructions ................................................... 41
Addressing Modes ............................................................................................... 43
Effective Address Calculation ............................................................................. 45
Overview.............................................................................................................. 49
Program Execution State ..................................................................................... 49
Exception-Handling State .................................................................................... 50
Exception Handling Operation ............................................................................ 51
Bus-Released State .............................................................................................. 52
...................................................................................................................... 19
.............................................................................................................
Contents
Rev. 2.00 Sep 20, 2005 page ix of xxxviii
1
1
6
7
7