HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 406

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 12 Serial Communication Interface
12.2.7
SSR is an 8-bit register containing multiprocessor bit values, and status flags that indicate the
operating status of the SCI.
Initial value
Read/Write
The CPU can always read and write SSR, but cannot write 1 in the TDRE, RDRF, ORER, PER,
and FER flags. These flags can be cleared to 0 only if they have first been read while set to 1.
The TEND and MPB flags are read-only bits that cannot be written.
SSR is initialized to H'84 by a reset and in standby mode.
Rev. 2.00 Sep 20, 2005 page 366 of 800
REJ09B0260-0200
Bit
Notes: 1. Only 0 can be written, to clear the flag.
Serial Status Register (SSR)
2. Function differs between the normal serial communication interface and the smart card interface.
R/(W) *
TDRE
1
7
Transmit data register empty
Status flag indicating that transmit data has been transferred from
TDR into TSR and new data can be written in TDR
1
RDRF
R/(W) *
0
6
Receive data register full
Status flag indicating that data has been received and stored in RDR
1
R/(W) *
ORER FER/ERS
5
0
Overrun error
Status flag indicating detection of a receive overrun error
1
R/(W) *
4
0
Framing error (FER)/Error signal status (ERS)*
Status flag indicating detection of a receive framing error,
or flag indicating detection of an error signal
1
R/(W) *
PER
3
0
Parity error
Status flag indicating detection of a receive parity
error
1
TEND
R
2
1
Transmit end *
Status flag indicating end of transmission
MPB
R
0
1
Multiprocessor bit
Stores the received
multiprocessor bit value
2
MPBT
Multiprocessor bit transfer
Value of multiprocessor bit
to be transmitted
R/W
0
0
2