HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 605

MCU 3V 256K 100-TQFP

HD64F3026X25

Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3026X25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
18.7
There are three kinds of flash memory program/erase protection: hardware, software, and error
protection.
18.7.1
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. In this state, the settings in flash memory control register 1 (FLMCR1) and
erase block register (EBR) are reset. In the error protection state, the FLMCR1 and EBR settings
are retained; the P bit and E bit can be set, but a transition is not made to program mode or erase
mode. (See table 18.8.)
Table 18.8 Hardware Protection
Notes: 1. The RAM area that overlapped flash memory is deleted.
Item
FWE pin
protection
Reset/
standby
protection
Error
protection
Flash Memory Protection
Hardware Protection
Description
When a low level is input to the FWE pin,
FLMCR1 and EBR are initialized, and the
program/erase-protected state is entered.
In a reset (including a WDT overflow reset)
and in standby mode, FLMCR1, FLMCR2, and
EBR are initialized, and the program/erase-
protected state is entered.
In a reset via the
entered unless the
oscillation stabilizes after powering on. In the
case of a reset during operation, hold the
pin low for the
AC Characteristics section. *
When a microcomputer operation error (error
generation (FLER = 1)) was detected while
flash memory was being programmed/erased,
error protection is enabled. At this time, the
FLMCR1 and EBR settings are held, but
programming/erasing is aborted at the time the
error was generated. Error protection is released
only by a reset via the
or in the hardware standby mode.
R E S
R E S
R E S
pulse width specified in the
pin, the reset state is not
R E S
pin is held low until
pin or a WDT reset,
4
Section 18 Flash Memory [H8/3024F-ZTAT Version]
Rev. 2.00 Sep 20, 2005 page 565 of 800
R E S
Program
Not
possible *
Not
possible
Not
possible
1
Function
Erase
Not
possible *
Not
possible *
Not
possible *
REJ09B0260-0200
3
3
3
Verify
Not
possible
Not
possible
Possible
*
2

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