HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 203

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Port 3 Data Direction Register (P3DDR): P3DDR is an 8-bit write-only register that can select
input or output for each pin in port 3.
P3DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P3DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. Therefore, if a transition is made to software standby mode while
port 3 is functioning as an input/output port and a P3DDR bit is set to 1, the corresponding pin
maintains its output state.
Port 3 Data Register (P3DR): P3DR is an 8-bit readable/writable register that stores output data
for port 3. When port 3 functions as an output port, the value of this register is output. When a bit
in P3DDR is set to 1, if port 3 is read the value of the corresponding P3DR bit is returned. When a
bit in P3DDR is cleared to 0, if port 3 is read the corresponding pin logic level is read.
P3DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Modes 1 to 5 (Expanded Modes)
Port 3 functions as a data bus, regardless of the P3DDR settings.
Modes 6 and 7 (Single-Chip Mode)
Port 3 functions as an input/output port. A pin in port 3 becomes an output port if the
corresponding P3DDR bit is set to 1, and an input port if this bit is cleared to 0.
P3 DDR
R/W
P3
7
W
7
0
7
0
7
P3 DDR
R/W
P3
6
W
6
0
6
0
6
P3 DDR
R/W
P3
5
W
5
0
5
0
Port 3 data direction 7 to 0
These bits select input or output for port 3 pins
Port 3 data 7 to 0
These bits store data for port 3 pins
5
P3 DDR
R/W
P3
4
W
4
0
4
0
4
Rev. 2.00 Sep 20, 2005 page 163 of 800
P3 DDR
R/W
P3
3
W
3
0
3
0
3
P3 DDR
R/W
P3
2
W
2
0
2
0
2
P3 DDR
Section 7 I/O Ports
R/W
P3
REJ09B0260-0200
1
W
1
0
1
0
1
P3 DDR
R/W
P3
0
W
0
0
0
0
0