DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 511

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DK-DEV-5SGXEA7/ES

Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Datasheets

Specifications of DK-DEV-5SGXEA7/ES

Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
Chapter 5: Transceiver Custom Configurations in Stratix V Devices
Standard PCS Custom and Low Latency Configurations
May 2011 Altera Corporation
Custom Configurations with the Standard PCS
1
Table 5–1
Table 5–1. Transmitter Standard PCS Datapath Latency
Table 5–2
Table 5–2. Receiver Standard PCS Datapath Latency
To use this chapter successfully, the Custom PHY IP Core and Low Latency PHY IP Core
chapters in the
used as references.
You can configure the custom PHY IP core in 8-bit or 10-bit width mode for low
speed, or in 16-bit or 20-bit width mode for higher data rates.
supported data rates.
Table 5–3. PCS-PMA Interface Widths and Data Rates in Custom Single-Width and Double-Width
Modes for Stratix V Devices
TX Phase Compensation FIFO
Byte Serializer
Notes to
(1) These numbers are preliminary.
(2) The TX Phase Compensation FIFO can be configured as register mode. The implementation is the same as TX FIFO
(3) This value is dependent on whether the block is enabled or disabled.
Word Aligner
Byte Serializer
Byte Ordering
RX Phase Compensation FIFO
Notes to
(1) These numbers are preliminary.
(2) This value is dependent on the configuration mode.
in 10G PCS.
Table
Table
shows the datapath latency for the standard PCS transmitter channel.
shows the datapath latency for the standard PCS receiver channel.
PCS-PMA Interface Width
Custom 8- or 10-bit width
Block
5–1:
5–2:
Custom 16-bit width
Custom 20-bit width
Block
Altera Transceiver PHY IP Core User Guide
(3)
Normal Latency
Normal Latency
3–7
1–2
1–3
3–4
(2)
4–5
1–2
(Note 1)
Stratix V Device Handbook Volume 3: Transceivers
Supported Data Rate Range PMA
(Note 1)
600 Mbps to 3.75 Gbps
1 Gbps to 8.5 Gbps
should be understood and
1 Gbps to 8 Gbps
Table 5–3
Low Latency
Low Latency
0–2
2–3
3–5
1
1
0
lists the
(3)
5–9

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