DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 138

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DK-DEV-5SGXEA7/ES

Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Datasheets

Specifications of DK-DEV-5SGXEA7/ES

Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
3–22
Table 3–5. Variable Precision DSP Block Dynamic Signals for Stratix V Devices
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
NEGATE
LOADCONST
ACCUMULATE
SUB_COMPLEX
COEFSELA
COEFSELB
CLK0
CLK1
CLK2
ENA0
ENA1
ENA2
ACLR0
ACLR1
Signal Name
Variable Precision DSP Block Control Signals
The Stratix V variable precision DSP block has a total of 14 dynamic control signal
inputs. The variable precision DSP block dynamic signals are user-configurable and
can be set to toggle or not at run time.
Table 3–5 on page 3–22
Stratix V variable precision DSP block supports 18-bit and 27-bit input cascading.
Control the operation of the decimation
Preload an initial value to the accumulator
Enable accumulation
This signal has two functions:
Controls the internal coefficient select multiplexer along with select signals
provided through the MSB of each 18-bit data input
Variable precision DSP-block-wide clock signals
Variable precision DSP-block-wide clock enable signals
Variable precision DSP-block-wide asynchronous clear signals
Controls add or subtract of the two 18
Controls dynamic switch between 36
Total Count per DSP Block
lists the variable precision DSP block dynamic signals. The
Function
x 36 mode and complex 18 x 18
x 18 multiplier results
Chapter 3: Variable Precision DSP Blocks in Stratix V Devices
Operational Mode Descriptions
May 2011 Altera Corporation
Count
14
1
1
1
1
2
3
3
2

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