DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 361

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 12: Power Management in Stratix V Devices
Temperature Sensing Diode
May 2011 Altera Corporation
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The TSD is a very sensitive circuit that can be influenced by noise coupled from other
traces on the board or within the device package itself, depending on your device
usage. The interfacing signal from the Stratix V device to the external temperature
sensor is based on millivolts (mV) of difference, as seen at the external TSD pins.
Switching the I/O near the TSD pins can affect the temperature reading. Altera
recommends taking temperature readings during periods of inactivity in the device or
use the internal TSD with built-in ADC circuitry.
The following are board connection guidelines for the TSD external pin connections:
■
■
■
■
■
■
■
■
■
■
■
For more information about device specification and connection guidelines, refer to
the external temperature sensor device data sheet from the device manufacturer.
The maximum trace lengths for the TEMPDIODE
less than eight inches.
Route both traces in parallel and place them close to each other with grounded
guard tracks on each side.
Altera recommends 10-mils width and space for both traces.
Route traces through a minimum number of vias and crossunders to minimize the
thermocouple effects.
Ensure that the number of vias are the same on both traces.
Ensure both traces are approximately the same length.
Avoid coupling with toggling signals (for example, clocks and I/O) by having the
GND plane between the diode traces and the high frequency signals.
For high-frequency noise filtering, place an external capacitor (close to the external
chip) between the TEMPDIODE
■
Place a 0.1 uF bypass capacitor close to the external device.
You can use internal TSD with built-in ADC circuitry and external TSD at the same
time.
If you only use internal ADC circuitry, the external TSD pins
(TEMPDIODE
TSD pins are not used.
f
For Maxim devices, use an external capacitor between 2200 pF to 3300 pF.
For more information about the TEMPDIODE
connection when you are not using an external TSD, refer to the
Device Family Pin Connection
P
/TEMPDIODE
N
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
P
) can be connected to GND because the external
/TEMPDIODE
Guidelines.
N
P
/TEMPDIODE
trace.
P
/TEMPDIODE
N
traces must be
N
pin
Stratix V
12–5