DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 357

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

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SV51013-1.2
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
May 2011
May 2011
SV51013-1.2
This chapter describes power management in Stratix
offer programmable power technology options for low-power operation. You can use
these options, along with speed grade choices, in different permutations to give the
best power and performance combination.
For thermal management, use the Stratix V internal temperature sensing diode (TSD)
with built-in analog-to-digital converter (ADC) circuitry or external TSD with an
external temperature sensor to easily incorporate this feature in your designs. Being
able to monitor the junction temperature of the device at any time also allows you the
ability to control air flow to the device and save power for the whole system.
Stratix V FPGAs deliver a breakthrough level of system bandwidth and power
efficiency for high-end applications, allowing you to innovate without compromise.
Stratix V devices use advanced power management techniques to enable both density
and performance increases while simultaneously reducing power dissipation.
The total power of an FPGA includes static and dynamic power.
■
■
Equation 12–1. Dynamic Power Equation
Note to
(1) P = power; C = load capacitance; and V = supply voltage level.
Equation 12–1
operating frequency of the design. However, you can vary the voltage to lower
dynamic power consumption by the square value of the voltage difference. Stratix V
devices minimize static and dynamic power with advanced process optimizations
and programmable power technology. These technologies enable Stratix V designs to
optimally meet design-specific performance requirements with the lowest possible
power.
The Quartus
ensure performance is met at the lowest power consumption. This automatic process
allows you to concentrate on the functionality of the design instead of the power
consumption of the design.
Static power is the power consumed by the FPGA when it is configured but no
clocks are operating.
Dynamic power is comprised of switching power when the device is configured
and running. You can calculate dynamic power with the equation shown in
Equation
Equation
®
12–1.
12–1:
II software optimizes all designs with Stratix V power technology to
shows that power is design-dependent and is determined by the
12. Power Management in Stratix V
P
=
1
-- - CV
2
(Note 1)
2

frequency
®
V devices. Stratix V devices
Devices
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