DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 225

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 6: High-Speed Differential I/O Interfaces and DPA in Stratix V Devices
Differential Receiver
Figure 6–10. Quartus II Software Assignment Editor – Programmable Pre-Emphasis
Differential Receiver
May 2011 Altera Corporation
f
Programmable Pre-Emphasis
Two different settings are allowed for pre-emphasis from the Assignment Editor for
each LVDS output channel.
values for programmable pre-emphasis in the Quartus II software Assignment Editor.
Table 6–5. Quartus II Software Assignment Editor
Figure 6–10
output port from the Quartus II software Assignment Editor.
Figure 6–11
differential buffer and fractional PLLs that can be shared between the transmitter and
receiver, a DPA block, a synchronizer, a data realignment block, and a deserializer.
The differential buffer can receive LVDS, mini-LVDS, and RSDS signal levels, which
are statically set in the Quartus II software Assignment Editor.
For more information, refer to
page
To
Assignment name
Allowed values
6–20.
Field
shows the hardware blocks of the Stratix V receiver. The receiver has a
shows the assignment of programmable pre-emphasis for a transmit data
tx_out
Programmable Pre-emphasis
0 (disable) and 1 (enable)
Table 6–5
Figure 6–18 on page 6–19
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
lists the assignment name and its possible
Assignment
and
Figure 6–19 on
6–11