DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 30

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

2–2
Table 2–1. Absolute Maximum Ratings for Stratix V Devices—Preliminary (Part 2 of 2)
Stratix V Device Handbook Volume 1: Overview and Datasheet
V
V
V
V
I
T
T
OUT
J
STG
CCIO
CCD_FPLL
CCA_FPLL
I
Symbol
I/O power supply
PLL digital power supply
PLL analog power supply
DC input voltage
DC output current per pin
Operating junction temperature
Storage temperature (No bias)
Maximum Allowed Overshoot and Undershoot Voltage
During transitions, input signals may overshoot to the voltage shown in
undershoot to -2.0 V for input currents less than 100 mA and periods shorter than
20 ns.
Table 2–2
overshoot voltage as a percentage of device lifetime. The maximum allowed
overshoot duration is specified as a percentage of high time over the lifetime of the
device. A DC signal is equivalent to 100% duty cycle. For example, a signal that
overshoots to 3.95 V can only be at 3.95 V for ~5% over the lifetime of the device; for a
device lifetime of 10 years, this amounts to half a year.
Table 2–2. Maximum Allowed Overshoot During Transitions—Preliminary
Vi (AC)
Symbol
lists the maximum allowed input overshoot voltage and the duration of the
AC input voltage
Description
Description
Chapter 2: DC and Switching Characteristics for Stratix V Devices
Condition (V)
3.85
3.95
4.05
4.15
3.8
3.9
4.1
4.2
4
Overshoot Duration as %
Minimum
-0.5
-0.5
-0.5
-0.5
-25
-55
-65
@ T
J
100
= 100°C
64
36
21
12
May 2011 Altera Corporation
7
4
2
1
Maximum
Electrical Characteristics
3.75
3.75
125
150
3.9
4.0
40
Table 2–2
Unit
Unit
mA
°C
°C
%
%
%
%
%
%
%
%
%
V
V
V
V
and