DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 239

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 6: High-Speed Differential I/O Interfaces and DPA in Stratix V Devices
Source-Synchronous Timing Budget
May 2011 Altera Corporation
Transmitter Channel-to-Channel Skew
Receiver Skew Margin for Non-DPA Mode
f
Transmitter channel-to-channel skew (TCCS) is an important parameter based on the
Stratix V transmitter in a source synchronous differential interface. This parameter is
used in receiver skew margin calculation. For more information, refer to
Skew Margin for Non-DPA Mode” on page
TCCS is the difference between the fastest and slowest data output transitions,
including the TCO variation and clock skew. For LVDS transmitters, the TimeQuest
Timing Analyzer provides a TCCS report, which shows TCCS values for serial output
ports.
You can get the TCCS value from the TCCS report (report_TCCS) in the Quartus II
compilation report in the TimeQuest Timing Analyzer, or from the
Characteristics for Stratix V Devices
Changes in system environment, such as temperature, media (cable, connector, or
PCB), and loading affect the receiver’s setup and hold times; internal skew affects the
sampling ability of the receiver.
Different modes of LVDS receivers use different specifications that can help in
deciding the ability to sample the received serial data correctly. In DPA mode, you
must use DPA jitter tolerance instead of receiver input skew margin (RSKM).
In non-DPA mode, use TCCS, RSKM, and sampling window (SW) specifications for
high-speed source-synchronous differential signals in the receiver datapath. The
relationship between RSKM, TCCS, and SW is expressed by the RSKM equation
shown in
Equation 6–1. RSKM
Conventions used for the equation:
■
■
■
■
RSKM—the timing margin between the receiver’s clock input and the data input
sampling window.
Time unit interval (TUI)—time period of the serial data.
SW—the period of time that the input data must be stable to ensure that data is
successfully sampled by the LVDS receiver. The SW is a device property and varies
with device speed grade.
TCCS—the timing difference between the fastest and the slowest output edges,
including t
The clock is included in the TCCS measurement.
Equation
CO
variation and clock skew, across channels driven by the same PLL.
6–1.
RSKM
chapter.
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
=
TUI SW
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–
6–25.
2
–
TCCS
DC and Switching
“Receiver
6–25