DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 175

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DK-DEV-5SGXEA7/ES

Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Datasheets

Specifications of DK-DEV-5SGXEA7/ES

Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
Revision History
May 2011 Altera Corporation
This section provides information about Stratix
memory interfaces, and high-speed differential interfaces with dynamic phase
alignment (DPA). This section includes the following chapters:
Refer to each chapter for its own specific revision history. For information on when
each chapter was updated, refer to the Chapter Revision Dates section, which appears
in the full handbook.
Chapter 5, I/O Features in Stratix V Devices
Chapter 6, High-Speed Differential I/O Interfaces and DPA in Stratix V Devices
Chapter 7, External Memory Interfaces in Stratix V Devices
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
Section II. I/O Interfaces
®
V device I/O features, external

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