DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 458

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

4–2
Figure 4–1. 10GBASE-R PHY Connection to IEEE802.3 MAC and RS
Stratix V Device Handbook Volume 3: Transceivers
Presentation
Application
Transport
Data Link
Session
Network
Physical
Reference
Layers
Model
OSI
Figure 4–1
in the OSI reference model.
10GBASE-R
PHY
shows the relationship between the 10GBASE-R PHY and other sublayers
XGMII
LLC (Logical Link Control) or other MAC Client
10GBASE-LR, -SR, -ER, or -lRM
MAC--Media Access Control
MDI
Chapter 4: Transceiver Protocol Configurations in Stratix V Devices
MAC Control (Optional)
10GBASE-R PCS
Higher Layers
Reconciliation
Serial PMA
Medium
CSMA/CD
LAYERS
PMD
LAN
10.3125 Gbps
32-bit data, 4-bit control (DDR @ 156.25 MHz)
May 2011 Altera Corporation
10GBASE-R