DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 126

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DK-DEV-5SGXEA7/ES

Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Datasheets

Specifications of DK-DEV-5SGXEA7/ES

Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
3–10
Figure 3–4. Three 9 x 9 Independent Multiplier Mode for Stratix V Devices
Note
(1) Three pairs of data are packed into the ax and ay ports; result contains three 18-bit products.
Figure 3–5. One 18 x 18 Independent Multiplier Mode with One Variable Precision DSP Block for Stratix V Devices
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
toFigure
ay[y2, y1, y0]
ax[x2, x1, x0]
3–4:
datab_0[17..0]
dataa_0[17..0]
Figure
Figure 3–9 on page 3–13
multiplier operation mode.
DSP blocks can support three individual 18 x 18 multipliers.
Variable Precision DSP Block
27
27
18
18
3–4,
Variable Precision DSP Block
Figure
3–5,
Figure 3–7 on page
show the variable precision DSP block in independent
Multiplier
Figure 3–6 on page 3–11
x
Mult_L
x
Chapter 3: Variable Precision DSP Blocks in Stratix V Devices
3–12,
(Note 1)
Figure 3–8 on page
shows that two variable precision
54
36
Operational Mode Descriptions
May 2011 Altera Corporation
result[35..0]
3–12, and
result[53..0]
(p2, p1, p0)

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