NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 829
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
Lead Free Status / RoHS Status
Compliant
- Current page: 829 of 848
- Download datasheet (9Mb)
November 2007
Order Number: 300641-004US
Table 734. XOR Chain #2
Table 735. XOR Chain #3
Testability
OUTPUT FERR#
VRMPWRGD
THRMTRIP#
Pin Name
A20GATE
IGNNE#
IRQ[15]
Pin Name
A20M#
RCIN#
FERR#
C/BE[1]#
C/BE[2]#
DEVSEL#
INIT#
INTR
AD[14]
AD[12]
AD[10]
AD[23]
AD[17]
AD[19]
AD[21]
AD[25]
AD[27]
AD[29]
AD[31]
NMI
PERR#
IRDY#
AD[8]
AD[3]
(RTCRST# asserted
for 5 PCI clocks
while PWROK active)
(Sheet 3 of 3)
(RTCRST# asserted
for 6 PCI clocks
while PWROK active)
(Sheet 1 of 4)
Ball #
AB29
AA28
AA29
W27
W28
V23
V26
U24
Y26
Y28
Y29
Ball #
AA29
G7
H8
D2
D1
G6
H7
G5
K8
K7
H4
G2
F5
E3
E2
F4
E1
F2
F1
Table 735. XOR Chain #3
HI_STB#/HI_STBF
HI_STB/HI_STBS
GPIO[32] / WDT
Pin Name
SATALED#
STPCLK#
CPUSLP#
GPIO[40]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[23]
GPIO[42]
GPIO[38]
GPIO[43]
GPIO[41]
HLCOMP
_TOUT#
CLK14
SMI#
SPKR
HL10
HL11
HL6
HL5
HL7
HL4
HL3
HL2
HL1
HL0
HL8
HL9
NC
NC
NC
NC
NC
NC
(RTCRST# asserted
for 6 PCI clocks
while PWROK active)
(Sheet 2 of 4)
Intel
®
6300ESB I/O Controller Hub
Ball #
W29
M28
M29
M25
M24
V29
V28
U28
R24
U29
R28
R29
N28
N29
N25
K29
K27
H29
H28
K25
G29
K24
H26
G28
T26
T27
T28
T29
P28
P29
L29
L28
L26
L24
L22
F29
J28
J27
829
DS
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