NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 77

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
3—Intel
Table 22.
3.21
3.21.1
Table 23.
November 2007
Order Number: 300641-004US
®
Note: The Intel
6300ESB ICH
Power and Ground Signals (Sheet 2 of 2)
Pin Straps
Functional Straps
The following signals are used for static configuration. They are sampled at various
reset points to select configurations, and then revert later to their standard usage. To
invoke the associated mode, the signal should be driven at least four PCI clocks prior to
the time it is sampled.
an audible click due to the pull-up on the SPKR output.
Functional Strap Definitions
SIU0_DTR
AC_SDOU
Signal
SPKR
V_CPU_IO
#
VccPLL
T
Name
Vss
®
6300ESB ICH changes the polarity of the “no reboot” strap in order to avoid
SAFE MODE
NO REBOOT
A16 swap
override
Usage
1.5 V supply for core well logic. This power may be shut off in S3, S4, S5 or
G3 states.
Powered by the same supply as the CPU I/O voltage. This supply is used to
drive the CPU I/F outputs.
0.8 to 1.75 V. The power will be shut in S3, S4, and S5 states.
Shared Grounds.
Rising Edge
of PWROK
Rising Edge
of PWROK
Rising Edge
of PWROK
Sampled
When
The signal has a weak internal pull-down. When
the signal is sampled high, the Intel
ICH will set the processor speed strap pins for safe
mode. Refer to processor specification for speed
strapping definition. The status of this strap is
readable via the SAFE_MODE bit (bit 2, D31: F0,
Offset D4h).
This signal has a weak internal pull-up. The Intel
6300ESB ICH starts driving it when PXPCIRST#
goes high. The status of this strap is readable via
D31: F0, Offset D5h, bit 5).
The signal has a weak internal pull-down. When
the signal is sampled high, this indicates that the
system is strapped to the “No Reboot” mode (The
Intel
system reboot feature). The status of this strap is
readable via the NO_REBOOT bit (bit 1, D31: F0,
Offset D4h).
®
Description
6300ESB ICH will disable the TCO Timer
Comment
Intel
®
6300ESB I/O Controller Hub
®
6300ESB
®
DS
77

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