NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 827
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
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Table 732. XOR Test Pattern Example
November 2007
Order Number: 300641-004US
In this example, Vector 1 applies all “0s”
to the chain inputs. The outputs being
non-inverting, will consistently produce a
“1” at the XOR output on a good board.
Likewise, applying Vector 7 (all “1s”) to the chain inputs (given that there are an even
number of input signals in the chain), will consistently produce a “1” at the XOR chain
output on a good board. One short to Vss (or open floating to Vss) will result in a “0” at
the chain output, signaling a defect. It is important to note that the number of inputs
pulled to “1” will affect the expected chain output value. If the number of chain inputs
pulled to “1” is even, then expect “1” at the output. If the number of chain inputs pulled
to “1” is odd, expect “0” at the output.
Continuing with the example in
chain in sequence, the XOR Output will toggle between “0” and “1.” Any break in the
toggling sequence (e.g., “1011”) will identify the location of the short or open.
Table 733. XOR Chain #1
Testability
Vector
GPIO[33] / PXIRQ[0]#
GPIO[34] / PXIRQ[1]#
GPIO[35] / PXIRQ[2]#
GPIO[36] / PXIRQ[3]#
1
2
3
4
5
6
7
GPIO[0] / PXREQ[2]#
PXREQ[1]#
PXFRAME#
Pin Name
C/BE[3]#
PXGNT0#
PXIRDY#
PLOCK#
PCICLK
Input
Pin 1
(RTCRST# asserted
for 4 PCI clocks
while PWROK active)
(Sheet 1 of 2)
0
1
1
1
1
1
1
Input
Pin 2
0
0
1
1
1
1
1
Table
Ball #
G1
H5
H1
H2
K1
R4
R6
L6
J6
J5
J3
J1
Input
Pin 3
0
0
0
1
1
1
1
732, as the input pins are driven to “1” across the
Input
Pin 4
One short to Vcc (or open floating to Vcc)
will result in a “0” at the chain output,
signaling a defect.
Table 733. XOR Chain #1
0
0
0
0
1
1
1
OUTPUT IRQ[14]
PXC/BE[1]#
PXC/BE[0]#
PXREQ64#
PXACK64#
Pin Name
Input
RASERR#
PXSTOP#
PXTRDY#
PXSERR#
PXPERR#
Pin 5
PXPAR
0
0
0
0
0
1
1
(RTCRST# asserted
for 4 PCI clocks
while PWROK active)
(Sheet 2 of 2)
Intel
®
6300ESB I/O Controller Hub
Input
Pin 6
0
0
0
0
0
0
1
Output
XOR
Ball #
AC23
1
0
1
0
1
0
1
AA1
AE1
AE5
AF4
T2
T5
U1
U2
U4
U6
827
DS
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