NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 524

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

Table 421. Offset 00h: Control/Status Register (Sheet 3 of 3)
Intel
DS
524
NOTES:
1. Software should do Read-Modify-Write operations to this register to preserve the contents of bits not being
2. To preserve the usage of Reserved bits in the future, software should always write the same value read from
Bits
Default Value:
3:0
4
modified. This include Reserved bits.
the bit until it is defined. Reserved bits will always return ’0’ when read.
®
6300ESB I/O Controller Hub
Device:
Offset:
WRITE_READ#_CNT:
DATA_LEN_CNT
29
00h
0000h
Name
Software sets this bit to indicate that the current request is a
write. Software clears this bit to indicate that the current
request is a read.
Reset default is ’0’.
This field is used to indicate the size of the data to be
transferred. Reset default = 0h.
For write operations, this field is set by software to indicate to
the hardware how many bytes of data in Data Buffer are to be
transferred to the console. A value of 0h indicates that a zero-
length packet should be sent. A value of 1-8 indicates 1-8
bytes are to be transferred. Values 9-Fh are illegal, and how
hardware behaves when used is undefined.
For read operations, this field is set by hardware to indicate to
software how many bytes in Data Buffer are valid in response
to a read operation. A value of 0h indicates that a zero-length
packet was returned and the state of Data Buffer is not
defined. A value of 1-8 indicates 1-8 bytes were received.
Hardware is not allowed to return values 9-Fh.
The transferring of data always starts with byte ’0’ in the data
area and moves toward byte 7 until the transfer size is
reached.
Description
Attribute:
Function:
Size:
7
Read/Write
32-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—11
November 2007
Access
R/W
R/W