NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 366

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NHE6300ESB S L7XJ

Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet

Specifications of NHE6300ESB S L7XJ

Lead Free Status / RoHS Status
Compliant
8.4.9
Table 245. OCW3—Operational Control Word 3 Register
Intel
DS
366
Bits
Default Value:
4:3
1:0
7
6
5
2
®
6300ESB I/O Controller Hub
Device:
Register Read Command
Offset:
Enable Special Mask
Poll Mode Command
Special Mask Mode
Mode (ESMM)
OCW3 Select
OCW3—Operational Control Word 3 Register
Reserved
(SMM)
31
Master Controller - 020h
Slave Controller - 0A0h
Bit[6,0]=0,
Bit[7,4:2]=undefined,
Bit[5,1]=1
Name
Reserved. Must be 0.
1 = The Special Mask Mode may be used by an interrupt
0 = Disable. The SMM bit becomes a “don't care”.
1 = Enable the SMM bit to set or reset the Special Mask
When selecting OCW3, bits 4:3 = ‘01’.
0 = Disable. Poll Command is not issued.
1 = Enable. The next I/O read to the interrupt controller is
These bits provide control for reading the In-Service Register
(ISR) and the Interrupt Request Register (IRR). When bit
1=0, bit 0 will not affect the register read selection. When bit
1=1, bit 0 selects the register status returned following an
OCW3 read. When bit 0=0, the IRR will be read. When bit
0=1, the ISR will be read. Following ICW initialization, the
default OCW3 port address read will be “read IRR”. To retain
the current selection (read ISR or read IRR), always write a 0
to bit 1 when programming this register. The selected register
may be read repeatedly without reprogramming OCW3. To
select a new status register, OCW3 must be reprogrammed
prior to attempting the read.
00 = No Action
01 = No Action
10 = Read IRQ Register
11 = Read IS Register
service routine to dynamically alter the system priority
structure while the routine is executing, through selective
enabling/disabling of the other channel's mask bits. Bit 5,
the ESMM bit, must be set for this bit to have any
meaning.
Mode.
treated as an interrupt acknowledge cycle. An encoded
byte is driven onto the data bus, representing the highest
priority level requesting service.
Description
Attribute:
Function:
Size:
0
Write-Only
8-bit
Order Number: 300641-004US
Intel
®
6300ESB ICH—8
November 2007
Access
WO
WO
WO
WO
WO

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