NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 439

• Manufacturer Part Number: NHE6300ESB S L7XJ
• Manufacturer: Intel

Specifications of NHE6300ESB S L7XJ

• Lead Free Status / RoHS Status: Compliant

9—Intel
9.1.5
9.1.6
November 2007
Order Number: 300641-004US
Bits
Bits
Default Value:
Default Value:
7:0
6:4
7
3
2
1
0
Table 327. Offset 08h: RID—Revision ID Register (IDE—D31:F1)
Table 328. Offset 09h: PI—Programming Interface (IDE—D31:F1)
®
Device:
Device:
Offset:
Offset:
6300ESB ICH
Revision ID Value
SOP_MODE_CAP
SOP_MODE_SEL
POP_MODE_CAP
POP_MODE_SEL
Offset 08h: RID—Revision ID Register (IDE—
D31:F1)
Offset 09h: PI—Programming Interface (IDE—
D31:F1)
Reserved
31
08h
See bit description
Name
31
09h
8Ah
Name
Refer to the Intel
most
up-to-date value of the Revision ID Register.
This read-only bit is a 1 to indicate that the Intel
ICH supports bus master operation
Reserved. Will always return 0.
This read-only bit is a 1 to indicate that the secondary
controller supports both legacy and native modes.
This read-write bits determines the mode that the secondary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
This read-only bit is a 1 to indicate that the primary controller
supports both legacy and native modes.
This read-write bits determines the mode that the primary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
NOTE: In the Intel
with a value of 0.
®
®
6300ESB ICH Specification Update for the
6300ESB ICH, this bit was read-only
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
1
Read-Only
8-bit
1
Read/Write
8-bit
Intel
®
6300ESB
®
6300ESB I/O Controller Hub
Access
Access
RO
439
DS